SystemC based Hardware Modeling, Prototyping and Verification Services

SystemC is a set of classes in C++ developed with the intention of designing and representing hardware at higher levels of abstraction than provided by classical HDLs. The higher levels of abstraction prove useful in developing software early for complex SoCs and help identify transaction complexities via architectural exploration. SystemC has been adopted throughout the semiconductor industry as an abstract modelling language and has been maintained as an IEEE standard since 2005. Various methodologies like Transaction Level Modeling (TLM), AMS (Analog and Mixed Signal) Extensions have been developed using SystemC for specific targeted areas of modelling. Complete designs that are built at higher abstraction levels are called virtual platforms.

Kasura has experience in developing IPs and integrating virtual platforms using SystemC as the modelling language. Kasura also has good experience in using TLM2.0 based methodologies for modelling IPs. Kasura has developed an internal portfolio of standard IPs using the SystemC and TLM2.0 standards.

Kasura has expertise in ESL modelling tools like Platform Architect, Processor Designer, CoMET System Engineering Environment, METeor Software Development Environment (all from Synopsys) and Code Composer Studio from Texas Instruments. These tools aid the designer in aspects like architecture performance analysis, power estimation and early software and device driver developments for hardware.

Case Studies