IP Portfolio
To showcase its talent in the field of hardware modelling using SystemC, Kasura has developed an internal IP portfolio consisting of models of IPs whose specifications are in the public domain.
Kasura has used SystemC and its associated transaction modelling library – the TLM2.0 to model these IPs. The IPs are verified for functionality and can be used as is in a pure TLM2.0 environment or by proper customisation suited to a proprietary environment.
Some of the IPs present in the portfolio –
- AHB DMAC
- AMBA UART
- I2C interface IP
- SPI Interface IP
- AMBA Timer
- AMBA Watchdog
- TLM models of AHB, OCP and Wishbone Bus